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G8MNY  > ATV      06.05.25 17:30l 74 Lines 3221 Bytes #21 (0) @ WW
BID : 32036_GB7CIP
Read: GUEST
Subj: Low Power Video Buffer
Path: JH4XSY<N3HYM<W9GM<N9PMO<CX2SA<GB7CIP
Sent: 250506/0827Z @:GB7CIP.#32.GBR.EURO #:32036 [Caterham Surrey GBR]
From: G8MNY@GB7CIP.#32.GBR.EURO
To  : ATV@WW

By G8MNY                            (CQTV 1993, new to packet Feb 06)
(8 Bit ASCII graphics use code page 437 or 850, Terminal Font)

For battery use, or merely power saving in a complex vision switchers, this
circuit was development from the standard 2 transistor (25mA) design, many
existing circuits can be modified to this arrangement.

The push-pull output means a more complex design, but it enables quite
substantial reductions in power (heat) consumption (about 5 times).

FEATURES
1. Very low current drawn, just 4mA, better than some Chips?
2. Push pull output stage.
3. High Input Z >10k
4. Correctly matched Output Z, to 75 Ohm
5. Low amplitude distortion, & low phase error.
6. Vision clamp, irons out poor LF response & hum
7. Vision clamp, stops sync crushing in amp.

              ﾚﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾄﾄﾄﾄ<+9-12V @ 4mA
              ｳ          ｳ             R8     ｳ          (no HUM!)
             R3         R5              ｳ     ｳ
              ｳ          ｳ            ｳ/e    +ｳC6
              ｳ          ﾃﾄﾄﾄﾄﾄﾂﾄﾄﾄﾂﾄﾄｴ TR2  ===
High Z    C1  ｳ        ｳ/    C4ｳ+ R6  ｳ\      ｳ
Video o)ﾄﾂﾄｴﾃﾄ)ﾄﾄﾄﾂﾄﾄﾄﾄｴTR1   ===  ｳ    ｳ     ｳ +      75�
Input    ｳ    ｳ  _ｳ_   ｳ\e     ﾀﾄﾂﾄﾙ    ﾃﾄR10ﾄ)ﾄﾄｴﾃﾄ(o Video
         ｳ    ｳ  /_\D1   ﾃﾄﾄﾄﾂﾄﾄﾄ)ﾄﾄR7ﾄﾄｴ     ｳ  C5 ｳ  Output
        R1    ﾃﾄﾄﾄｴ      ｳ   ｳ   ｳ    ｳ/      ｳ     ｳ
         ｳ    ｳ   ｳ      ｳ C3ｳ   ﾀﾄﾄﾄﾄｴ TR3   ｳ     ｳ
 Optionalｳ    ｳ  ===C2   ｳ  ===       ｳ\e     ｳ     ｳ
    Term  /   R2  ｳ     R4   ｳ          ｳ     ｳ     ｳ
         ｳ    ｳ   ｳ      ｳ   ｳ         R9     ｳ     ｳ
       ﾄﾄﾁﾄﾄﾄﾄﾁﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾁﾄ<0v

Type\No  1      2      3     4     5     6     7     8     9     10
  R     75R    33K   100K   2K7   2K7   220K  3K3   10R   10R    39R
  C     u2     u1     22p   10u   470u   47u
  Tr   BC109  BC212  BC107
  D    1N4148

HOW IT WORKS
C1-2, D1, & R2-3 form the input biasing clamp, this maintains the input voltage
at 3V, so with a gain of 2x, the output voltage will always be around 6V.

TR1-2, & R5 make up the standard non inverting amplifier with the gain being
set by (R4+R7)/R4. However R8 provides extra current negative feed back on the
TR2 emitter, which reduces the loop gain slightly, but greatly improves
linearity. This consiquently enables the more linear driving voltage in T2 base
to be suitable to feed (via C4) a complementary output components TR3 & R9. TR3
provides the light DC quescent load of 3mA, from the low base current through
R6.

The HF trim is set up by C3 at a value of 22pF (try a preset if you like). This
results in no phase error (lead/lag on Vectorscope) through the amplifier. With
faster transistors, a reduced value for C3 may be required for perfect colour
phase alignment.

CONCLUSION
To give 75R output Z, R10 has to be lower than the frequently encounterd 68R,
this is due to the slighty high output impedance created by the loop gain being
lowered by the linearizing effects of R8 & R9. This limits the usefulness of
this circuit for multiple outputs.
The power supply must clean, as any ripple present will be fed into the TR3
base!


Why Don't U send an interesting Bul?

73 de John G8MNY @ GB7CIP


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