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G8MNY > TECH 02.07.25 17:06l 93 Lines 4220 Bytes #6 (0) @ WW
BID : 35908_GB7CIP
Subj: Crystal Drift Compensation
Path: JH4XSY<JE7YGF<LU4ECL<ED1ZAC<GB7CIP
Sent: 250702/0755Z @:GB7CIP.#32.GBR.EURO #:35908 [Caterham Surrey GBR]
From: G8MNY@GB7CIP.#32.GBR.EURO
To : TECH@WW
By G8MNY (New Jan 08)
(8 Bit ASCII graphics use code page 437 or 850, Terminal Font)
Here is a design used in my Systron Donner signal generator's master
oscillator. That does not waste power & warm up time that a crystal oven needs,
it uses thermistor thermal compensation DC to a varicap to cancel temperature
drift.
The principles can be applied to any frequency counter, VHF/UHF rig crystal osc
etc. to null out thermal drift.
CIRCUIT
This is quite simple all housed in a soldered up copper case. But getting the
right tapping resistance values is a factory task.
+8V ____
ﾚﾄﾄﾄﾂﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾂﾄｴ7808ﾃﾄﾂﾄﾄ+12V
R1 ｳThermal Rc 100R === ~~ｳ~ ===
ｳ ｳCompensation Colpitts ｳ ｳ u1ﾀﾄﾄﾄﾄﾁﾄﾄﾄｴ u1
ｳ TH1 Osc ﾚﾄRbﾄﾄﾄﾄﾁﾂﾄﾄﾂﾄｴﾃﾄﾄｿ ｳ ﾁ
ｳ ｳ ｳ ｳ/ ｳ ｳ ﾃﾄﾄ>O/P
ﾃﾄﾄﾄｴ 4MHz ﾃﾄﾄﾄﾂﾄﾄｴT1 ｳ ｳ ｳ/
ｳ ﾃﾄﾄﾄﾂﾄ150Kﾄﾂﾄﾄﾄﾂﾄｴ[]ﾃﾄｴ_ === ｳ\e ﾀﾄRb2ﾄﾁﾄｴT2
ｳ ｳ ｳ =ｳ= ｳ ｳ/| ﾃﾄﾄﾄﾄｴ ｳ\e
ｳ TH2 === /_\ === VC1=== ｳ Re Buffer ｳ
R2 ｳ ｳu1 ｳV1 ｳC1 /ｳ === ｳ ｳ
ﾀﾄﾄﾄﾁﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾁﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄ0V
Can be any osc circuit!
It works by using 2 thermistors one +ve coefficient & one -ve coefficient that
alter the preset standing bias set up by on varicap V1 by R1 & R2. By choosing
the right thermistor resistance in parallel with the set resistor twice over,
a good temperature compensation range can be made were one thermistor hands
over to the other.
The extent of the frequency change possible is limited to the thermistor DC
change & the proportion of C1 that the varicap can change, as well as the Q of
the crystal etc.
The amateur radio work this arrangement may be too complex & a simpler 1
thermistor system may be better.
SIMPLER CIRCUIT
+8V ____
ﾚﾄﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾂﾄｴ7808ﾃﾄﾂﾄﾄ+12V
ｳ ｳ Rc 100R === ~~ｳ~ ===
TH1 10K Colpitts ｳ ｳ u1ﾀﾄﾄﾄﾄﾁﾄﾄﾄｴ u1
ｳ VR1 ｳ Osc ﾚﾄRbﾄﾄﾄﾄﾁﾂﾄﾄﾂﾄｴﾃﾄﾄｿ ｳ ﾁ
ﾃﾄ100Kﾄﾄｴ ｳ ｳ/ ｳ ｳ ﾃﾄﾄ>O/P
ｳ /ｳ\ ｳ 4MHz ﾃﾄﾄﾄﾂﾄﾄｴT1 ｳ ｳ ｳ/
ｳ ﾃﾄﾄﾄ)ﾄ150Kﾄﾂﾄﾄﾄﾂﾄｴ[]ﾃﾄｴ_ === ｳ\e ﾀﾄRb2ﾄﾁﾄｴT2
10K === ｳ =ｳ= ｳ ｳ/| ﾃﾄﾄﾄﾄｴ ｳ\e
VR2 ｳ 10K /_\ === VC1=== ｳ Re Buffer ｳ
ｳ ｳ ｳ ｳV1 ｳC1 /ｳ === ｳ ｳ
ﾀﾄﾄﾄﾁﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾁﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄ0V
Note if you are adding a varicap the value of C1 or any other frequency
affecting capacitor it's value may need to be changed to compensate for the
added capacitance of V1.
In this circuit the varicap V1 bias is set up the 2 10K resisters at 1 end of
VR1, & at the other end a thermistor & VR2 set exactly the same voltage at the
mid operating temperature (TH1 = VR2).
Now with VR1 set nearest the 10k's then cooling/warming the WHOLE osc will make
it drift & adjusting VR2 towards the TH1 end should put it back on frequency.
If the drift gets worse, then reverse the position of VR2 & TH1 to reverse the
effect. If the effect is not enough then try altering the amount of varicap C
by using say 2-3 varicaps in parallel & no parallel capacitor C1. Or use a
higher slope thermistor.
The final adjustment of VR1 will need to be done when the osc is calibrated as
thermal drift due to the amount of VC1 trimmer might be significant.
CONCLUSION
The addition of this circuit should null out all drift over a narrow
temperature band say 10-25. But outside that range more variable rates of
compensation may be need. It will of course not stop other mechanical causes of
drift like dropping kit or general crystal aging.
See also my related tech buls,"Simple Crystals Oven", "198kHz Off Air Standard"
"Off Air Lock for Ref Osc", "Comparing Off Air Freq Standards", & "Calibrating
Frequency".
Why don't U send an interesting bul?
73 de John G8MNY @ GB7CIP
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