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G8MNY > TECH 28.02.26 19:44l 45 Lines 1829 Bytes #8 (0) @ WW
BID : 53228_GB7CIP
Read: GUEST
Subj: Mono Stable Revisited
Path: JH4XSY<N3HYM<VE3CGR<CX2SA<ED1ZAC<GB7CIP
Sent: 260228/1032Z @:GB7CIP.#32.GBR.EURO #:53228 [Caterham Surrey GBR]
From: G8MNY@GB7CIP.#32.GBR.EURO
To : TECH@WW
By G8MNY (Updated Sep 18)
(8 Bit ASCII graphics use code page 437 or 850, Terminal Font)
I needed a timer to timeout a 0V ON signal, on a Tx after a few minutes for RDS
Trafic flag. I had done it before with a 555 timer and input & output
conditioning inverters, all far too complex really. So I had a re-think on the
basic 2 transistor circuit, and came up with this simple junk box design.
A simular circuit can be used on PTT line of most Tx to limit key up time!
+5-20V >ﾄﾄﾂﾄﾄﾄﾄﾂﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾄﾄﾄｿ
10K ｳ 33K 1K
ｳ 2M2 ｳ _ｳ_
ｳ ｳR ｳ LED=\_/ Time
ｳ ｳ BC337ﾃﾄｿ ﾃﾄﾄﾄﾄﾄﾄ>Limited
Low ｳ + ｳ T1ｳ/ ｳ ｳ/BC337 Low Output
Input >ﾄﾄﾄﾁﾄｴﾃﾄﾁﾄ10Kﾄﾂﾄﾄｴ>ﾃﾄﾄｴ ﾀﾄﾄﾄｴ T2
C 100u === * ｳ\e ｳ\e
u1 ｳ ｳ ｳ
0V >ﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄ>
With no input, T1 is on & T2 held off. The 33K must be low enough to get 0V out
of T2 with required load, and the 2M2 must be low enough for T1 to turn off T2.
Higher gain transistor like the BC109c (Beta = 900) can be used for T1 with R
of 10M for longer times, if the cap C is realy low leakage.
With the input low, a negative voltage equal to the power rail, is appled to
T1's base & diode, holding it off for around 200 seconds. The CR time constant
of 2M2 with the 100uF cap sets the time, but a leaky C will only shorten the
time slighty in this circuit.
T1s Base 10K & u1 give basic false pulse/RF imunity.
On 5V the diode (* 1N4148) can be omitted as it is not needed to protect T1's
base from going too negative & damaging T1.
Why Don't U send an interesting bul?
73 De John, G8MNY @ GB7CIP
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