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G8MNY  > TECH     22.06.25 16:52l 87 Lines 3654 Bytes #2 (0) @ WW
BID : 35261_GB7CIP
Subj: Darlington & Quasi Darlington
Path: JH4XSY<N3HYM<K5DAT<GB7BED<GB7YEW<GB7CIP
Sent: 250622/0750Z @:GB7CIP.#32.GBR.EURO #:35261 [Caterham Surrey GBR]
From: G8MNY@GB7CIP.#32.GBR.EURO
To  : TECH@WW

By G8MNY                                        (Updated May 06)
(8 Bit ASCII graphics use code page 437 or 850, Terminal Font)

This simple way to improve the current gain of a transistor just use 2 in
cascade, often used in PSUs & AF output stages & even the odd RF signal amp.
Two separate devices can be used or in a single package.

NORMAL           Collector
DARLINGTON   ﾚﾄﾄﾄﾄｴ    /|\
        T1 ｳ/     ｳ     |
Base  ﾄﾄﾄﾄﾄｴ      ｳ    1V         Current
       /|\ ｳ\e  ｳ/   Saturated     Gain HFE  = T1 x T2
        |    ﾀﾄﾄｴ T2    |
    1-1.5V      ｳ\e     |
        ﾀ - - ->  ｳ    \|/
                 Emitter

This method has the 2 transistors of the same type, & has the disadvantage of
higher bias voltage.

QUASI             ｳ Collector!
DARLINGTON      ｳ/e      /|\
       NPN   ﾚﾄﾄｴ T2      |
        T1 ｳ/   ｳ\ PNP   1V
Base ﾄﾄﾄﾄﾄﾄｴ      ｳ    Saturated    Gain HFE = T1 x T2
      /|\  ｳ\e    ｳ       |
      0.6V   ﾀﾄﾄﾄﾄｴ      \|/
       ﾀ - - ->   ｳ Emitter

This is often used where T1 is a PNP & T2 is a cheaper high power NPN.

To speed up the 2nd transistor turn off, a low � is often used base to emitter
in either configuration.

AS USED IN A PUSH PULL AMP
                              DARLINGTON              3A
 Quasi          ﾚﾄﾄﾄﾄﾂﾄﾄRbsﾄﾄﾄﾂﾄﾄﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄo-oﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄ<+70V
 Complementary  ｳ   Rc      ｳ/ T3      ｳ             Fuse      ｳ  From Bridge
 Class B Output ｳ    ﾃﾄﾄﾄﾄﾄﾄｴ NPN      ｳ                      +ｳ   Rectifier
               ===   ｳ  6mA ｳ\e      ｳ/ T5                    ===
             Cbsｳ   _ｳ_       ﾃﾄﾄﾄﾄﾄﾄｴ NPN               Cpowerｳ  e.g. 50V @ 2A
                ｳ   \_/ D1    ｳ   .2Aｳ\e                       ｳ   transformer
                ｳ    ｳBias   100R      ｳ                       ｳ
                ｳ    ｳ        ｳ        Re     4A Pk            ｳ
            ﾚﾄﾄﾂﾁﾄﾄﾄﾄ)ﾄﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾄﾅﾄﾄﾄﾄﾄﾄﾄﾂﾄﾄﾄﾄﾄｿ         ｳ
          Rnfb ｳ    _ｳ_ D2             Re      ｳu1   ｳ+        ｳ
            ｳ+ ｳ    \_/       ﾚﾄﾄﾄﾄﾄﾄﾄﾄｴ      ===   === Cls    ｳ
           === ｳ     ｳ      ｳ/e T2     ｳ       ｳ     ｳ         ｳ
        Cnfbｳ  Rb    ﾃﾄﾄﾄﾄﾄﾄｴ PNP      ｳ       ｳ    ﾚﾁｿ/ｳLS    ｳ
            ｳ  ｳ   ｳ/       ｳ\       ｳ/ T4    8R    ﾀﾂﾙ\ｳ8R    ｳ
AF>ﾄﾄRinﾄｴﾃﾄﾁﾄﾄﾁﾄﾄﾄｴNPN       ﾃﾄﾄﾄﾄﾄﾄｴ NPN    1W     ｳ 50W RMS ｳ
Input    Cin    T1 ｳ\e       100R    ｳ\e       ｳ     ｳ         ｳ
   ﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄﾄﾄﾄﾄﾄﾁﾄﾄﾄﾄ<0v
        CLASS A STAGE    QUASI COMPLIMENT    ZOBAL   LOAD

COMPONENT VALUES
Input Z = Rin,  e.g. 10K
XCin = Rin @ 10Hz,  e.g. 2uF
Rb sets 35V on output, ((Rc+Rs) x T1Hfe), e.g. 330K
Gain = (Rnfb//Rb)/Rin, e.g. 10x = 150K
XCnfb = Rnfb @ < 10Hz, e.g. 1uF
T1= 100mA 100V 100x 1W NPN device
T2 & T3 = 1A 100V 30x 5W, e.g. TIP30 PNP & TIP29 NPN
T4 & T5 = 15A 100V 20x 115W on heatsink, e.g. 2N3055
100� in T4 & 5 base-emitter, ensure they turn off properly.
D1 & D2 drop the 1.3V needed to just under bias outputs, e.g. 1N4148
Re maintain thermal stability, e.g. 0R22 2W
Rc sets the peak +ve output current (e.g. ｫ x LS x T5Hfe x T3Hfe) e.g. 2K2 2W
Cbs & Rbs make a bootstrap to maintain current through Rc.
 Rbs = Rc/2  e.g. 1K 1W
 XCbs = Rbs @ < 10Hz  e.g. 30uF @ 50V
XCls = LS @ < 10Hz  e.g. 1000uF @ 50V
XCpower = LS @ < 20Hz, assuming 100Hz supply from bridge, e.g. 4700uF @ 80V
Zobal network keeps the output terminated at HF when the LS is open circuit,
for stability.

In practice there would be more gain stages in front providing 3V RMS drive &
more N.F.B. for lower overall distortion, but this circuit should work OK.


Why don't U send an interesting bul?

73 De John, G8MNY @ GB7CIP


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